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DPDK Dispatch July

By Monthly Newsletter
1. Main Announcements
    • Last chance to register in-person or virtually for the DPDK APAC Summit July 9-10 register here
    • Apply to speak at the DPDK Summit 2024 Montreal by July 21
3. User Stories, Dev Spotlights 4. DPDK & Technologies in the news:
5. Performance Reports & Meeting Minutes This newsletter is sent out to thousands of DPDK developers, it’s a collaborative effort. If you have a project release, pull request, community event, and/or relevant article you would like to be considered as a highlight for next month, please reply to Thank you for your continued support and enthusiasm. DPDK Team.

The Journey of Jerin Jacob: From Embedded Linux Engineer to DPDK Leadership

By Community Spotlight

Jerin Jacob, a Senior Director at Marvell, is a pivotal maintainer in the DPDK community. With 20 years of experience, Jerin’s career began with Linux kernel development, laying the groundwork for his extensive contributions to high-performance networking. After joining Cavium, later acquired by Marvell, Jerin was tasked with supporting an open-source data plane framework on the OCTEON processor family, marking the beginning of his journey with DPDK.

A Natural Progression into Software Development

Jerin’s journey into software development began in his early childhood. He recalls playing card games and needing to emulate dice rolls. Using a bit of ingenuity and low-level programming, he turned a calculator into a makeshift dice emulator. This early exposure to basic programming concepts sparked his interest in computers during the early 1990s.

After completing his school years, Jerin pursued a diploma in Electronics and Communication, followed by a degree in Computer Science Engineering. During his diploma, he had access to Windows 3.1, where he started programming in BASIC and System programming. These initial experiences laid a strong foundation for his future endeavors.

In his engineering studies, Jerin transitioned to Linux kernel work, a significant shift from his earlier experiences with Windows 95. His first job involved moving Linux to embedded systems, a novel concept at the time. He worked on Multimedia SoCs focusing on  Linux architecture/SoC porting and peripherals drivers for PCI, USB and Storage. This period, encompassing about ten years of full Linux development, significantly shaped his skills and expertise.

After a decade in Linux development, Jerin moved to Cavium, a company known for its innovation in the semiconductor industry who specialized in ARM-based and MIPS-based network, video, and security, This opportunity marked a new era in his career as he delved into user-space data plane work, which required a different mindset. Optimizing for performance became paramount, and he honed new skills in system-wide knowledge, Cache architecture, Virtualization, SMMU (System Memory Management Unit), and writing optimized drivers. 

This skill set of balancing high performance with the flexibility to accommodate various vendor’s in driver subsystem development, set the stage for his future contributions to DPDK, where he would learn to create APIs that maintained performance while enabling contributions from multiple vendors to support vendor neutral APIs in DPDK.

The Technical Transition from Cavium to Marvell

Initially, when Cavium was in the data plane market, they had a SKU called OCTEON, which was primarily a proprietary SDK (Software Development Kit) based on MIPS architecture. To attract more customers and leverage open source activities, they decided to contribute to DPDK. Jerin led the Cavium/Marvell transition in this effort, adding ARM64 architecture support and specific hardware drivers.

Most of this work was done during his time at Cavium, including the initial ARM64 port. When Cavium’s acquisition by Marvell began, the focus shifted to fully integrating open-source contributions, moving away from proprietary SDKs. Marvell was instrumental in initiating this shift. In particular, Jerin’s manager at the time, Prasun Kapoor (now Assistant Vice President of Core Software, Infrastructure Processors at Marvell Technology), was pivotal in facilitating Jerin’s contributions to the DPDK community and the broader open source ecosystem.

Under Prasun’s guidance, Jerin was able to focus on integrating ARM64 support and specific hardware drivers into DPDK, transitioning from proprietary SDKs to fully open source contributions. This strategic shift has been supported by Marvell’s commitment to open-source innovation, a direction strongly advocated by Prasun at the time.

This strategic move allowed the team to build open-source accelerator drivers and contribute significantly to the DPDK community. This transition also marked the expansion of Jerin’s team, growing from a single person to around 50 contributors, significantly enhancing their collaborative efforts in high-performance networking. For instance, in Marvell’s current SKUs (Stock Keeping Units), Jerin achieved the capability of handling 105 million packets per second per core, a testament to his focus on performance optimization.

The acquisition of Cavium by Marvell, completed in July 2018,  was a strategic move to create a leading semiconductor company focused on infrastructure solutions. This merger combined Marvell’s expertise in storage controllers, networking solutions, and high-performance wireless connectivity with Cavium’s strengths in network, video, and security processors.

The Journey into DPDK

Being one of the first contributors to the DPDK project was both challenging and rewarding for Jerin Jacob. The community played a significant role in this journey, constantly providing feedback and support. When Jerin began working on adding ARM64 support, his initial task was to eliminate dependencies on x86 in the build process. This effort involved adding a new layer for ARM64 support, benefiting greatly from the input and guidance of other maintainers at that time.

The early DPDK community was small, comprising a few dedicated individuals. Jerin recalls working alongside Bruce Richardson, Thomas Monjalon, Konstantin Ananyev, Stephen Hemminger, and Anatoly Burakov. While Anatoly primarily focused on the memory subsystem, Bruce and Stephen were deeply involved in various aspects of the project. Konstantin Ananyev, an x86 maintainer, was also instrumental in helping Jerin navigate the intricacies of integrating ARM64 support, providing valuable insights on maintaining cross-architecture compatibility.

Technical Contributions

Jerin started contributing to DPDK by tackling the significant challenge of removing x86 build dependencies and introducing ARM 64-bit (ARM64) support. This groundbreaking effort involved optimizing numerous libraries for ARM-specific instructions, making DPDK versatile and robust across different hardware platforms.

One of Jerin’s major achievements includes the development of the Event Device subsystem, which abstracts work scheduling aspects of hardware. This subsystem has been widely adopted by companies like Ericsson, Intel, NXP, and Marvell, demonstrating its broad applicability and impact.

Jerin also authored the Regular Expression (RegEx) device class and ML (Machine Learning), enabling advanced pattern matching  and machine learning capabilities within DPDK. Furthermore, he developed the Graph Library, which enables graph-based packet processing, and the high-performance Trace Library, essential for performance monitoring and debugging. Both libraries have significantly enhanced DPDK’s capabilities.

In addition to his technical contributions, Jerin has been a respected maintainer in the DPDK community. He assists with maintaining various subsystems and sub-trees, collaborates with other major contributors, and represents Marvell on the technical board.

Work-Life Balance

Jerin Jacob places a high value on maintaining a balanced work-life dynamic, even while managing the demands of a high-paced career. One of his favorite ways to unwind and recharge is through travel. He typically plans solo trips once or twice a year, offering him the opportunity to explore new places and experiences. Additionally, he ensures to take at least one family trip annually, cherishing the moments spent with his loved ones and creating lasting memories.

Apart from traveling, Jerin is committed to lifelong learning. He dedicates time to expanding his knowledge in various fields, including Advanced Machine Learning (AML) and other emerging technologies. This continuous learning enhances his skill set and keeps him abreast of the latest advancements in his field.

Advice to New Developers Entering the Community

For new developers entering the community, Jerin suggests diving into the existing bug lists, starting with minor bugs or major ones depending on your comfort level. Fixing bugs, no matter the size, is an excellent way to familiarize yourself with the codebase and understand the project’s intricacies.

Another crucial area to focus on is improving the build system. This aspect is common to all contributors and offers a manageable way to get involved without feeling overwhelmed. Start with lightweight tasks that you can handle comfortably. This approach helps you gain confidence and learn the workflows and standards of the community.

Once you feel comfortable and have gained some recognition within the community, gradually move on to contributing to subsystems and higher-level aspects of the project. These areas require more time and more profound knowledge but offer significant learning opportunities and a chance to make a substantial impact.

The Importance of DPDK Summit Events and In-Person Interactions

Jerin’s experience with DPDK events has been instrumental in shaping his contributions to the community. He has attended almost all the European Summits, which serve as vital platforms for maintainers and tech leaders to communicate and collaborate. These summits provide an opportunity for in-person discussions, which are invaluable for exchanging ideas and resolving issues more effectively than through mailing lists alone. 

Reflecting on his first summit, Jerin recalls the excitement and the significant difference it made to meet people in person after years of communication through mailing lists. The initial years, around a decade ago, did not feature many summits, or he was not in a position to travel. The shift from purely online interactions to face-to-face meetings brought a new level of understanding and collaboration. The feedback and discussions that occurred in person were far more proactive and productive, helping to build a sense of camaraderie and mutual understanding.

Meeting his peers in person allowed Jerin to understand their perspectives and work more seamlessly with them. He highlights that once you know people personally, it becomes easier to align proposals and projects to meet their expectations and avoid potential conflicts. This personal interaction helps in anticipating how someone might react to a new idea, enabling a more strategic approach to collaboration.

DPDK Maintainers as a Band of Musicians

If DPDK maintainers were a band, each member would play a unique and vital role, similar to musicians in an orchestra or a rock band. In this analogy, Jerin sees himself as the lyricist. The lyricist’s role is crucial as it involves creating the first stage of the song, defining how it needs to be structured, and setting the tone and direction for the rest of the band. This is akin to Jerin’s contributions to DPDK, where he defines high-level designs and APIs, laying the groundwork for others to build upon.

As a lyricist, Jerin focuses on the initial conceptualization and strategic planning of the project. He provides the foundational elements and guidelines that others follow to ensure the project progresses smoothly and coherently. Just as a song starts with lyrics that give it meaning and direction, Jerin’s work ensures that the project’s core components are well-defined and robust.

While Jerin primarily identifies with the role of the lyricist, he acknowledges that maintainers can take on multiple roles within the DPDK “band.” However, due to his current responsibilities, he is more focused on the planning and strategic aspects rather than individual contributions. He likens this to writing the lyrics rather than performing on stage.

Technology Jerin Could Not Live Without

For Jerin, mobile devices and computers are indispensable. These technologies are not only integral to his daily life but also form the backbone of his professional work. Mobile devices, in particular, offer the flexibility and connectivity that keep him engaged and productive, no matter where he is. They enable seamless communication, instant access to information, and the ability to manage various tasks on the go.

Computers, on the other hand, are essential for more intensive computing tasks, development work, and large-scale projects. They provide the robust capabilities needed for coding, debugging, and running complex simulations. Jerin relies heavily on these tools to execute his work efficiently and effectively.

In addition to these fundamental technologies, Jerin is continuously learning and adapting to new advancements. He is particularly interested in Artificial Intelligence and Machine Learning (AI/ML). By exploring how AI/ML can be leveraged, Jerin aims to offload mundane and repetitive tasks, allowing people to focus on more critical and creative aspects of their work. This approach not only enhances productivity but also fosters innovation.

The Future of DPDK and the Impact of AI

Jerin envisions a future where many routine and repetitive tasks in software development are offloaded to artificial intelligence (AI). This includes writing unit test cases, ensuring proper git commits, checking the sanity of code, and refactoring. AI’s role will be to handle these mundane yet essential tasks, allowing developers to focus on innovative and complex aspects of development.

He believes that once the initial ideas and high-level design are defined, AI can significantly accelerate the development process. While AI can take over tasks that follow set patterns and rules, such as generating unit test cases or identifying code regressions, the core implementation and performance-critical coding will still require human expertise. This is because the nuanced understanding of performance optimization is something that AI cannot fully replicate yet.

By automating repetitive tasks, AI can reduce the workload for maintainers. For instance, when a new patch is submitted, AI can review the code for basic sanity checks, allowing human maintainers to concentrate on more complex reviews and implementation details. This synergy between AI and human developers can lead to more efficient and faster development cycles. Jerin sees AI playing a crucial role in integrating new technologies and developing new libraries.

The Convergence of AI and Emerging Technologies in DPDK’s Future

Jerin envisions a transformative future for the Data Plane Development Kit (DPDK) project, driven by the convergence of AI, IoT, decentralized infrastructure, cloud computing, 5G, and other emerging technologies. This integration will significantly influence the direction and development of DPDK.

Expanding Beyond Drivers

Initially, DPDK focused primarily on driver development. However, the project’s scope is now expanding to include protocol aspects. For instance, Marvell has recently upstreamed support for security protocols like PDCP and TLS. The DPDK graph library is setting the stage for further protocol support, which will extend the project’s capabilities beyond simple driver APIs to include hardware-accelerated protocol development.

Workload-Driven Accelerators

In the past, general-purpose CPUs were sufficient for most tasks. However, the landscape is shifting towards workload-driven accelerators. Today’s approach involves understanding specific workloads and optimizing for them, rather than developing generic solutions. This top-down methodology means that companies, particularly hyperscalers like Google, are designing chips tailored to their specific workloads. This shift from general-purpose to workload-optimized accelerators is a key trend that DPDK is aligning with.

Offloading to Accelerators

Jerin sees a future where various tasks are offloaded to specialized accelerators. Starting from packet processing, the evolution includes offloading complete security, AI, and machine learning workloads. This shift involves using data processing units (DPUs) or other specialized processors (XPUs) to handle intensive tasks, allowing the main host CPU to focus on orchestrating these processes rather than executing them.

The Role of AI in Development

AI will play a crucial role in automating many routine tasks within DPDK development, such as writing unit test cases, ensuring proper git commits, checking code sanity, and refactoring. By offloading these repetitive tasks to AI, developers can focus on more complex and innovative aspects of development. While AI will handle the repetitive and structured tasks, human developers will continue to drive the implementation of new ideas and performance-critical code.

Future Integration and Development

As AI and blockchain technologies become more integrated, DPDK will adapt to support these advancements. The project will continue to evolve, focusing on enabling seamless integration and efficient execution of these emerging technologies within the DPDK framework. This includes optimizing accelerators for specific workloads, ensuring that the host CPU delegates rather than performs intensive tasks.

Overall, Jerin Jacob’s vision for DPDK involves a continuous evolution towards supporting more complex protocols and workloads, driven by the convergence of AI and other emerging technologies. This will enable DPDK to remain at the forefront of technological innovation and performance optimization.

Reflections on Open Source and DPDK

Jerin has been a significant contributor to both the Linux kernel and the DPDK (Data Plane Development Kit) projects. Reflecting on his journey, he shares his thoughts on the impact of open-source contributions to his career and personal growth.

Jerin finds great enjoyment in contributing to open source projects. This joy stems not only from the act of coding, but also from engaging with the community. “You can learn a lot from the community and how other people think about a given technical problem in different ways,” he explains. The collaborative nature of open source fosters an environment where diverse perspectives come together, leading to innovative solutions and continuous learning.

Contributing to DPDK has played a crucial role in Jerin’s personal and career development. He acknowledges the platform as a stepping stone in his corporate journey. “It’s helped me in a lot of personal growth as well,” Jerin states, emphasizing how open source contributions have bolstered his professional advancement. By proving his skills and consistently contributing to high-impact projects, Jerin has been able to climb the corporate ladder effectively.

Jerin likens his experience with DPDK to building a staircase. Each contribution is a stone laid down, providing a foundation for the next. “You prove something, and it’s like one stepping stone. With that, we put another stone, and you can just build on that,” he says. This iterative process of contributing, learning, and growing has been a rewarding and empowering journey for Jerin.

In summary, Jerin’s reflections highlight the impact that contributing to open source projects like DPDK can have on an individual’s career and personal development. It is a testament to the value of open-source communities in fostering growth, collaboration, and innovation.

Learn more about how you can contribute here:

DPDK Dispatch June

By Monthly Newsletter

1. Main Announcements

3. User Stories, Dev Spotlights

  • Submit a blog here
  • Submit a developer spotlight here

4. DPDK & Technologies in the news:

5. Performance Reports & Meeting Minutes

This newsletter is sent out to thousands of DPDK developers, it’s a collaborative effort. If you have a project release, pull request, community event, and/or relevant article you would like to be considered as a highlight for next month, please reply to

Thank you for your continued support and enthusiasm.

DPDK Team.

Microsoft Azure Mana DPDK Q&A

By Blog

In today’s rapidly evolving digital landscape, the demand for high-speed, reliable, and scalable network solutions is greater than ever. Enterprises are constantly seeking ways to optimize their network performance to handle increasingly complex workloads. The integration of the Data Plane Development Kit (DPDK) with Microsoft Azure’s Network Adapter (MANA) is a groundbreaking development in this domain.

Building on our recent user story, “Unleashing Network Performance with Microsoft Azure MANA and DPDK,” this blog post delves deeper into how this integration is revolutionizing network performance for virtual machines on Azure. DPDK’s high-performance packet processing capabilities, combined with MANA’s advanced hardware offloading and acceleration features, enable users to achieve unprecedented levels of throughput and reliability.

In this technical Q&A, Brian Denton Senior Program Manager, at Microsoft Azure Core further illuminates the technical intricacies of DPDK and MANA, including the specific optimizations implemented to ensure seamless compatibility and high performance. He also elaborates on the tools and processes provided by Microsoft to help developers leverage this powerful integration, simplifying the deployment of network functions virtualization (NFV) and other network-centric applications.

1. How does Microsoft’s MANA integrate with DPDK to enhance the packet processing capabilities of virtual machines on Azure, and what specific optimizations are implemented to ensure compatibility and high performance?

[Brian]: MANA is a critical part of our hardware offloading and acceleration effort. The end goal is to maximize workloads in hardware and minimize the host resources needed to service virtual machines. Network Virtual Appliance (NVA) partner products and large customers leverage DPDK to achieve the highest possible network performance in Azure. We are working closely with these partners and customers to ensure their products and services take advantage of DPDK on our new hardware platforms.

2. In what ways does the integration of DPDK with Microsoft’s Azure services improve the scalability and efficiency of network-intensive applications, and what are the measurable impacts on latency and throughput?

[Brian]: Network Virtual Appliances are choke points in customers networks and are often chained together to protect, deliver, and scale applications. Every application in the network path adds processing and latency between the endpoints communicating. Therefore, NVA products are heavily focused on speeds and feeds and designed to be as close to wire-speed as possible. DPDK is the primary tool used by firewalls, WAF, routers, Application Delivery Controllers (ADC), and other networking applications to reduce the impact of their products on network latency. In a virtualized environment, this becomes even more critical.

3. What tools and processes has Microsoft provided for developers to leverage DPDK within the Azure ecosystem, and how does this integration simplify the deployment of network functions virtualization (NFV) and other network-centric applications? 

[Brian]: We provide documentation on running testpmd in Azure: Most NVA products are on older LTS Linux kernels and require backporting kernel drivers, so having a working starting point is crucial for integrating DPDK application with new Azure hardware.

4. How does DPDK integrate with the MANA hardware and software, especially considering the need for stable forward-compatible device drivers in Windows and Linux?

[Brian]: The push for hardware acceleration in a virtualized environment comes with the drawback that I/O devices are exposed to the virtual machine guests through SR-IOV. Introducing the next generation of network card often requires the adoption of new network drivers in the guest. For DPDK, this depends on the Linux kernel which may not have drivers available for new hardware, especially in older long-term support versions of Linux distros. Our goal with the MANA driver is to have a common, long-lived driver interface that will be compatible with future networking hardware in Azure. This means that DPDK applications will be forward-compatible and long-lived in Azure.

5. What steps were taken to ensure DPDK’s compatibility with both Mellanox and MANA NICs in Azure environments?

[Brian]: We introduced SR-IOV through Accelerated Networking early 2018 with the Mellanox ConnectX-3 card. Since then, we’ve added ConnectX-4 Lx, ConnectX-5, and now the Microsoft Azure Network Adapter (MANA). All these network cards still exist in the Azure fleet, and we will continue to support DPDK products leveraging Azure hardware. The introduction of new hardware does not impact the functionality of prior generations of hardware, so it’s a matter of ensuring new hardware and drivers are supported and tested prior to release.

6. How does DPDK contribute to the optimization of TCP/IP performance and VM network throughput in Azure?

[Brian]: See answer to #2. DPDK is necessary to maximize network performance for applications in Azure, especially for latency sensitive applications and heavy network processing.

7. How does DPDK interact with different operating systems supported by Azure MANA, particularly with the requirement of updating kernels in Linux distros for RDMA/InfiniBand support?

[Brian]: DPDK applications require a combination of supported kernel and user space drivers including both Ethernet and RDMA/InfiniBand. Therefore, the underlying Linux kernel must include MANA drivers to support DPDK. The latest versions of Red Hat and Ubuntu support both the Ethernet and InfiniBand Linux kernel drivers required for DPDK.

8. Can you provide some examples or case studies of real-world deployments where DPDK has been used effectively with Azure MANA?

[Brian]: DPDK applications in Azure are primarily firewall, network security, routing, and ADC products provided by our third-party Network Virtual Appliance (NVA) partners through the Marketplace.  With our most recent Azure Boost preview running on MANA, we’ve seen additional interest by some of our large customers in integrating DPDK into their own proprietary services.

9. How do users typically manage the balance between using the hypervisor’s virtual switch and DPDK for network connectivity in scenarios where the operating system doesn’t support MANA?

[Brian]: In the case where the guest does not have the appropriate network drivers for the VF, the netvsc driver will automatically forward traffic to the software vmbus. The DPDK application developer needs to ensure that they support the netvsc PMD to make this work.

10.What future enhancements or features are being considered for DPDK in the context of Azure MANA, especially with ongoing updates and improvements in Azure’s cloud networking technology?

[Brian]: The supported feature list is published in the DPDK documentation: 1. Overview of Networking Drivers — Data Plane Development Kit 24.03.0-rc4 documentation ( We will release with the current set of features and get feedback from partners and customers on demand for any new features.

11. How does Microsoft plan to address the evolving needs of network performance and scalability in Azure with the continued development of DPDK and MANA?

[Brian]: We are focused on hardware acceleration to drive the future performance and scalability in Azure. DPDK is critical for the most demanding networking customers and we will continue to ensure that it’s supported on the next generations of hardware in Azure.

12. How does Microsoft support the community and provide documentation regarding the use of DPDK with Azure MANA, especially for new users or those transitioning from other systems?

[Brian]: Feature documentation is generated out of the codebase and results in the following:

Documentation for MANA DPDK, including running testpmd, can be found here:

13. Are there specific resources or training modules that focus on the effective use of DPDK in Azure MANA environments?

[Brian]: We do not have specific training resources for customers to use DPDK in Azure, but that’s a good idea. Typically, DPDK is used by key partners and large customers that work directly with our development teams.

14. Will MANA provide functionality for starting and stopping queues?

[Brian]: TBD. What’s the use case and have you seen a need for this? Customers will be able to change the number of queues, but I will have to find out whether they can be stopped/started individually.

15. Is live configuration of Receive Side Scaling (RSS) possible with MANA?

[Brian]: Yes. RSS is supported by MANA.

16. Does MANA support jumbo frames?

[Brian]: Jumbo frames and MTU size tuning are available as of DPDK 24.03 and rdma-core v49.1

17. Will Large Receive Offload (LRO) and TCP Segmentation Offload (TSO) be enabled with MANA?

[Brian]: LRO in hardware (also referred to as Receive Segment Coalescing) is not supported (software should work fine)

18. Are there specific flow offloads that MANA will implement? If so, which ones?

[Brian]: MANA does not initially support DPDK flows. We will evaluate the need as customers request it.

19. How is low migration downtime achieved with DPDK?

[Brian]: This is a matter of reducing the amount of downtime during servicing events and supporting hotplugging. Applications will need to implement the netvsc PMD to service traffic while the VF is revoked and fall back to the synthetic vmbus.

20. How will you ensure feature parity with mlx4/mlx5, which support a broader range of features?

[Brian]: Mellanox creates network cards for a broad customer base that includes all the major public cloud platforms as well as retail.  Microsoft does not sell the MANA NIC to retail customers and does not have to support features that are not relevant to Azure. One of the primary benefits of MANA is we can keep functionality specific to the needs of Azure and iterate quickly.

21. Is it possible to select which NIC is used in the VM (MANA or mlx), and for how long will mlx support be available?

[Brian]: No, you will never see both MANA and Mellanox NICs on the same VM instance. Additionally, when a VM is allocated (started) it will select a node from a pool of hardware configurations available for that VM size. Depending on the VM size, you could get allocated on ConnectX-3, ConnectX-4 Lx, ConnectX-5, or eventually MANA. VMs will need to support mlx4, mlx5, and mana drivers till hardware is retired from the fleet to ensure they are compatible with Accelerated Networking.

22. Will there be support for Windows and FreeBSD with DPDK for MANA?

[Brian]: There are currently no plans to support DPDK on Windows or FreeBSD. However, there is interest within Microsoft to run DPDK on Windows.

23. What applications are running on the SoC?

[Brian]: The SoC is used for hardware offloading of host agents that were formerly ran in software on the host and hypervisor. This ultimately frees up memory and CPU resources from the host that can be utilized for VMs and reduces impact of neighbor noise, jitter, and blackout times for servicing events.  

24. What applications are running on the FPGA?

[Brian]: This is initially restricted to I/O hardware acceleration such as RDMA, the MANA NIC, as well as host-side security features.

Read the full user story ‘Unleashing Network Performance with Microsoft Azure MANA and DPDK’

Cache Awareness in DPDK Mempool

By Blog

Author: Kamalakshitha Aligeri – Senior Software Engineer at Arm

The objective of DPDK is to accelerate packet processing by transferring the packets from the NIC  to the application directly, bypassing the kernel. The performance of DPDK relies on various factors such as memory access latency, I/O throughput, CPU performance, etc.

Efficient packet processing relies on ensuring that packets are readily accessible in the hardware  cache. Additionally, since the memory access latency of the cache is small, the packet processing  performance increases if more packets can fit into the hardware cache. Therefore, it is important  to know how the packet buffers are allocated in hardware cache and how it can be utilized to get  the maximum performance. 

With the default buffer size in DPDK, hardware cache is utilized to its full capacity, but it is not  clear if this is being done intentionally. Therefore, this blog helps in understanding how the  buffer size can have an impact on the performance and things to remember when changing the  default buffer size in DPDK in future. 

In this blog, I will describe, 

1. Problem with contiguous buffers 

2. Allocation of buffers with cache awareness 

3. Cache awareness in DPDK mempool 

4. l3fwd performance results with and without cache awareness 

Problem with contiguous buffers 

The mempool in DPDK is created from a large chunk of contiguous memory. The packets from  the network are stored in packet buffers of fixed size (objects in mempool). The problem with  contiguous buffers is when the CPU accesses only a portion of the buffer, such as in cases like  DPDK’s L3 forwarding application where only metadata and packet headers are accessed. Rest of  the buffer is not brought into the cache. This results in inefficient cache utilization. To gain a better  understanding of this problem, its essential to understand how the buffers are allocated in hardware  cache. 

How are buffers mapped in Hardware Cache? 

Consider a 1KB, 4-way set-associative cache with 64 bytes cache line size. The total number of  cache lines would be 1KB/64B = 16. For a 4-way cache, each set will have 4 cache lines. Therefore, there will be a total of 16/4 = 4 sets. 

As shown in Figure1, each memory address is divided into three parts: tag, set and offset. 

• The offset bits specify the position of a byte within a cache line (Since each cache line is  64 bytes, 6 bits are needed to select a byte in a single cache line). 

• The set bits determine which set the cache line belongs to (2 bits are needed to identify the  set among 4 ways).

• The tag bits uniquely identify the memory block. Once the set is identified with set bits,  the tag bits of the 4 ways in that set is compared against the tag bits of the memory address,  to check if the address is already present in the cache. 

Figure 1 Memory Address 

In Figure 2, each square represents a cache line of 64 bytes. Each row represents a set. Since it’s a  4-way cache, each set contains 4 cache lines in it – C0 to C3. 

Figure 2 Hardware Cache 

Let’s consider a memory area that can used to create a pool of buffers. Each buffer is 128 bytes,  hence occupies 2 cache lines. Assuming the first buffer address starts at 0x0, the addresses of the  buffers are as shown below. 

Figure 3 Contiguous buffers in memory

In the above figure the offset bits are highlighted in orange, set bits in green and tag bits in blue. Consider buffer 1’s address, where set bits “00” means the buffer maps to set0. Assuming initially  all the sets are empty, buffer 1 occupies the first cache line of 2 contiguous sets. 

Since buffer 1 address is 0x0 and the cache line size is 64 bytes, the first 64 bytes of the buffer  occupy the cache line in set0. For the next 64 bytes, the address becomes 0x40 (0b01000000) indicating set1 because the set bits are “01”. As a result, the last 64 bytes of the buffer occupy the  cache line in set1. Thus, the buffer is mapped into cache lines (S0, C0) and (S1, C0). 

Figure 4 Hardware cache with buffer 1 

Similarly, buffer 2 will occupy the first cache line of next two sets (S2, C0) and (S3, C0).

Figure 5 Hardware cache with 2 buffers 

The set bits in buffer 3 address “00” show that the buffer 3 maps to set 0 again. Since the first  cache line of set0 and set1 is occupied, buffer 3 occupies second cache line of set 0 and 1 (S0, C1)  and (S1, C1). 

Figure 6 Hardware cache with 3 buffers 

Similarly buffer 4 occupies the second cache-line of sets 2 and 3 and so on. Each buffer is  represented with a different color and a total of 8 buffers can occupy the hardware cache without  any evictions.  

Figure 7 Allocation of buffers in hardware cache 

Although the buffer size is 128 bytes, CPU might not access all the bytes. For example, for 64 bytes packets, only the first 64 bytes of the buffer are consumed by the CPU (i.e. one cache line  worth of data).  

Since the buffers are two cache lines long, and are contiguous, and only the first 64 bytes of each  buffer is accessed, only sets 0 and sets 2 are populated with data. Sets 1 and 3 go unused (unused  sets are shown with pattern in Figure 8).

Figure 8 Unused sets in hardware cache 

When buffer 9 needs to be cached, it maps to set 0 since set bits are “00”. Considering a LRU  replacement policy, the least recently used cache line of 4 ways (buffer 1, 3, 5 or 7) in set0 will be  evicted to accommodate buffer 9 even though set 1 and set 3 are empty. 

This is highly inefficient, as we are not utilizing the cache capacity to the full.  

Solution – Allocation of buffers with Cache awareness 

In the above example, if the ununsed cache sets can be utilized to allocate the subsequent buffers (buffers 9 – 16), we would utilize the cache in a more efficient manner. 

To accomplish this, the memory addresses of the buffers can be manipulated during the creation  of mempool. This can be achieved by inserting one cache line padding after every 8 buffers,  effectively aligning the buffer addresses in a way that utilizes the cache more efficiently. Let’s take the above example of contiguous buffer addresses and then compare it with same buffers  but with cache line padding. 

Figure 9 Without cache lines padding Figure 10 With cache lines padding

From figure 9 and 10, we can see that the buffer 9 address has changed from 0x400 to 0x440. With 0x440 address, the buffer 9 maps to set1. So, there is no need to evict any cache line from set0 and  we are utilizing the unused cache set 1. 

Similarly, buffer 10 maps to set3 instead of set2 and so on. This way buffer 9 to buffer 16, can  occupy the sets1 and 3 that are unused by buffers1 to 8. 

Figure 11 Hardware cache with cache awareness 

This approach effectively distributes the allocation of buffers to better utilize the hardware cache. Since for 64-byte packets, only the first cache line of each buffer contains useful data, we are  effectively utilizing the hardware cache capacity by accommodating useful packet data from 16  buffers instead of 8. This doubles the cache utilization, enhancing the overall performance of the  system. 

Padding of cache lines is necessary primarily when the cache size is exactly divisible by the buffer  size (which means buffer size is a power of 2). In cases where the buffer size does not divide  evenly into the cache size, part of the buffer is left unmapped. This residual portion effectively  introduces an offset like the one achieved through padding. 

Cache Awareness in DPDK Mempool 

In DPDK mempool, each buffer typically has a size of 2368 bytes and consists of several distinct  fields – header, object and trailer. Let’s look at each one of them.

Figure 13 Mempool buffer fields 

Header: This portion of the buffer contains metadata and control information needed by DPDK to  manage buffer efficiently. It includes information such as buffer length, buffer state or type and  helps to iterate on mempool objects. The size of the object header is 64 bytes. Object: This section contains actual payload or data. Within the object section, there are additional  fileds such as mbuf, headroom and packet data. The mbuf of 128 bytes contains metadata such as  message type, offset to start of the packet data and pointer to additional mbuf structures. Then  there is a headroom of 128 bytes. The packet data is 2048 bytes that contains packet headers and  payload. 

Trailer: The object trailer is 0 bytes, but a cookie of 8 bytes is added in debug mode. This cookie acts as a marker to prevent corruptions. 

With a buffer size of 2368 bytes (not a power of 2), the buffers are inherently aligned with cache  awareness without the need for cache line padding. In other words, the buffer size is such that it  optimizes cache utilization without the need for additional padding. 

The buffer size of 2368 bytes does not include the padding added to distribute buffers across  memory channels. 

To prove how the performance can vary with a buffer size that is power of 2, I ran an experiment  with 2048 buffer size and compared it against the default buffer size of mempool in DPDK. In the experiment 8192 buffers are allocated in the mempool and a histogram of cache sets for all  the buffers was plotted. The histogram illustrates the number buffers allocated in each cache set. 

Figure 14 Histogram of buffers – 2048 bytes 

With a buffer size of 2048 bytes, the same sets in the hardware cache are hit repeatedly, whereas  other sets are not utilized (we can see that from the gaps in the histogram) 

Figure 15 Histogram of buffers – 2368 bytes

With a buffer size of 2368 bytes, each set is being accessed only around 400 times. There are no  gaps in the above histogram, indicating that the cache is being utilized efficiently. 

DPDK l3fwd Performance 

The improved cache utilization observed in the histogram, attributed to cache awareness, is further  corroborated by the throughput numbers of the l3fwd application. The application is run on a  system with 64KB 4-way set associative cache. 

Below chart shows the throughput in MPPS for single core l3fwd test with 2048 and 2368 buffer  sizes 

Figure 16 l3fwd throughput comparison

There is a 17% performance increase with the 2368 buffer size. 


Contiguous buffer allocation in memory with cache awareness enhances performance by  minimizing cache evictions and maximizing hardware cache utilization. In scenarios where the  buffer size is exactly divisible by the cache size (e.g., 2048 bytes), padding cache lines creates a offset in the memory addresses and better distribution of buffers in the cache. This led to a 17%  increase in performance for DPDK l3fwd application. 

However, with buffer sizes not precisely divisible by the cache size, as is the default in DPDK,  padding of cache lines already occurs because of the offset in the buffer addresses, resulting in an improved performance. 

For more information visit the programmers guide

Tracing Ciara Power’s Path: A Leap from Mathematics to DPDK Expertise at Intel

By Community Spotlight

Welcome to the latest installment of our DPDK Developer Spotlight series, where we share the unique journeys and insights of those who contribute to the DPDK community. This edition highlights Ciara Power, a former Technical Lead and Network Software Engineer at Intel. We explore her path into open source development from a math enthusiast at school to a software developer shaping the future of DPDK.

Early Life and Education

A Mathematical Foundation

Ciara’s pathway into the world of computer science and programming was not straightforward. Initially grounded in mathematics, her educational journey began in an environment where technical subjects were rarely emphasized, particularly at an all-girls school in Ireland, that did not prioritize technological advancements. Despite this, Ciara’s inherent love for math led her to pursue it at the university level. 

Discovering Programming

While pursuing her studies at the University of Limerick, Ciara encountered a pivotal moment—a chance to explore programming through an introductory taster course subject. This opportunity resonated with a piece of advice she had received from her mother since childhood: she was destined to be a programmer. 

Transitioning to Computer Science 

A Turning Point

This insight from her mother proved to be more than mere encouragement; it was a recognition of Ciara’s innate abilities and potential for finding joy and fulfillment in a realm she had yet to explore. Indeed, this was a powerful testament to the foresight and intuition that mothers often have about their children’s hidden talents like they say, ‘Mother knows best’’.

After finishing the programming subject course, Ciara reached a turning point. The practical aspects of problem solving appealed to her more than theoretical mathematics. Driven by this preference, and after several challenging weeks, she decided to exit the mathematics course. That September, she took a notable step by starting a computer science course at the Waterford Institute of Technology.

The first year of her computer science studies confirmed her decision; she thrived in this environment, where she could apply logical thinking to tangible problems. The satisfaction of crafting solutions and the joy of creative exploration grounded her. 

Balancing Hobbies and Career

A Blend of Technical and Artistic Talents

Ciara’s enthusiasm for her studies crossed over into other areas of her life, enriching her creative pursuits. From painting and drawing to woodworking and knitting, she embraced a wide array of hobbies, each providing a different outlet for her creative expression. This blend of technical skill and artistic talent became a defining feature of her approach to both work and leisure. 

Ciara’s engagement with her various hobbies provides a crucial balance and unique perspective that enhances her programming work: the ability to visualize the broader picture before delving into details. Just as a painter steps back to view the whole canvas, Ciara applies a similar approach in her coding practices. This allows her to assess a project from various angles. 

Her method of drawing diagrams on a whiteboard is emblematic of her systematic approach to problem-solving, juxtaposed with her ability to incubate ideas and contemplate them from different perspectives. 

This blend of logic and creativity marks her programming style, making her adept at tackling complex problems with innovative solutions. Her ability to think outside the box and not get overly absorbed in minutiae gives her an edge, making her work both methodical and inspired.

Moreover, these pursuits offer Ciara a form of catharsis, a way to decompress and process information subconsciously, which in turn feeds into her professional work. 

Her dual approach—systematic yet open to creative leaps—illustrates how her hobbies not only complement but actively enhance her capabilities as a programmer. This synergy between her personal interests and professional skills exemplifies how diverse experiences can contribute to professional excellence in technology and programming.

Professional Development at Intel

Internship and Real-World Experience

Ciara’s transition from academia to the practical, fast-paced world of software development provided her with an invaluable perspective that she would carry throughout her career. Her internship with the DPDK team at Intel in Shannon, Ireland, was not just about gaining professional experience; it was a deep dive into the collaborative and iterative processes of real-world technology development.

Challenges and Adaption

During her eight-month placement, Ciara engaged directly with complex projects that were far more advanced than her college assignments. This experience was crucial for her; it wasn’t just about coding but also about understanding how large-scale software development projects function, how teams interact, and how products evolve from a concept to a market-ready entity.

One significant challenge was her initial foray into the open source community through DPDK. Coming from an academic background where open source wasn’t a focus, the learning curve was steep. 

She had to quickly adapt to the open source ethos of sharing, collaborative open development, and the transparent critique of code. Learning to navigate and contribute to discussions on mailing lists, where she interacted with developers of varying seniority from around the world, was initially daunting.

As a newcomer, she was initially anxious about how she might be received, given the prevalent challenges women often face in tech environments. However, her experience was overwhelmingly positive. From the onset, she was treated with the same respect and consideration as any seasoned developer. This egalitarian approach was not only affirming but also empowering.

To ingratiate herself within the DPDK community, Ciara adopted a humble approach to learning and contributing. She began by actively listening and understanding the community dynamics before making her contributions. 

Reviewing others’ code and providing constructive feedback became a routine that not only helped her understand the nuances of professional coding but also built her reputation as a thoughtful and capable developer. This proactive engagement helped her transition from an intern at Intel to a respected member of the community.

Projects and Technical Accomplishments

Ciara’s technical journey with DPDK deepened significantly, largely due to the interactions and guidance from OG maintainers Bruce Richardson (Network Software Engineer at Intel Corporation) and Akhil Goyal (Principal Engineer at Marvell Semiconductor). 

Her first major project was contributing to the development of the Telemetry Library V1 a library for retrieving information and statistics about various other DPDK libraries through socket client connections. This not only honed her technical skills but also gave her a solid understanding of handling community feedback for large patchsets, with plenty of discussion around how to implement the library.

In terms of her main contributions, Ciara refactored the unit test framework, adding support for nested testsuites. This included reworking the cryptodev autotests to make use of nested testsuites and ensure all testcases are counted individually in test summaries. This, in turn, improved the testing experience for the user, making it easier to see which testcases are passing/failing [0].

She was also Involved in various improvements for Intel IPsec-mb SW PMDs, including combining PMDs to use common shared code [1], adding multiprocess support [2], and adding Scatter-Gather List support [3] [3.1]

Ciara also worked on removing Make build system from DPDK. Meson had been introduced a few releases prior, so it was time to completely remove the old build system, with help from many others. A huge task, it touched on nearly every document, library and driver. This involved significant collaboration in the community, with plenty of reviews and testing taking place by other developers and maintainers. [3].

She Added an API and commandline argument to set the max SIMD bitwidth for EAL. Previously, a number of components in DPDK had optional AVX-512 or other vector paths which can be selected at runtime by each component using its own decision mechanism. This work added a single setting to control what code paths are used. This can be used to enable some non-default code paths e.g. ones using AVX-512, but also to limit the code paths to certain vector widths, or

to scalar code only, which is useful for testing. [4]

Additionally Ciara Improved the cryptodev library Asymmetric session usage, by hiding the structure in an internal header, and using a single mempool rather than using pointers to private data elsewhere [4]. She also Enabled numerous QAT devices and algorithms, including most recently, new GEN3 and GEN5 devices [5].

Bug Fixing

Ciara’s proactive engagement led her to work on fixing various bugs. By utilizing bug detection tools like Address Sanitiser and Coverity, she debugged and resolved a wide range of bugs. This process was not just about resolving immediate issues; it also helped her build a deeper understanding of better programming practices that could be applied in future feature development.  

By contributing significant patches and actively participating in community discussions, Ciara received encouragement instead of the skepticism or condescension often found in other communities. This supportive atmosphere helped her quickly find her footing and gain confidence in her abilities. Her contributions were evaluated solely on their merit, reflecting the DPDK community’s commitment to contributor diversity.

Community Engagement and Recognition

Active participation and support 

Throughout her journey, the open source community, particularly her interactions on the DPDK forums and mailing lists, played a crucial role. Under the guidance of Bruce Richardson, Pablo de Lara Guarch and Akhil Goyal, Ciara not only contributed significantly but also gained insights that helped shape her technical and strategic acumen. 

This exposure allowed her to understand diverse perspectives and collaborative methods essential for open development and open governance across technical communities.

Major Accomplishments

Reflecting on her significant milestones with DPDK, Ciara highlights two major accomplishments. During her internship at Intel, she contributed to the development of the Telemetry Library V1, a library for retrieving information and statistics about various other DPDK libraries through socket client connections. 

Upon returning as a graduate, she was entrusted with the complete rewrite of this library, leading to the development of Telemetry V2. This task demonstrated her progression as a developer, showcasing her ability to significantly improve and build upon her earlier work within a relatively short span of time. 

Her involvement in developing this library was a significant learning journey, filled with complex challenges and intensive problem-solving that required her to engage deeply with the technology and the DPDK community. 

The Telemetry library project stood out not only for its technical demands but also for the collaborative effort it required. Ciara navigated through numerous technical discussions, debates, and feedback loops, integrating community insights to implement and enhance the robustness of the code. 

Another notable highlight was her handling of large patch sets. These weren’t monumental in features but were substantial in scope and impact, involving critical enhancements and fixes that improved DPDK’s functionality and reliability.

Valued advice and the Importance of Code Reviews

One of the most impactful pieces of advice Ciara received from the DPDK community centered on the importance of code reviews. Embracing this practice not only honed her technical skills but also cultivated a mindset geared towards continuous improvement and collaboration. 

This advice underscored the necessity of meticulously reviewing her own code as well as that of others, which facilitated a deeper understanding of various coding approaches and strategies.

Ciara learned that taking a step back to scrutinize every detail of her work from a broader design perspective was crucial. This approach allowed her to explore alternative solutions and methodologies that might not be immediately apparent. 

Engaging in thorough reviews helped her identify potential issues before they escalated, enhancing the overall quality and reliability of her contributions.

Personal Achievement and Awards

Ciara has been recognized multiple times for her contributions at Intel, underscoring her influence and impact within the tech giant. One of her notable accolades includes the Intel Women’s Achievement Award 2021, a testament to her substantial and measurable impact on Intel’s business, profitability, and reputation. 

This award is particularly significant as it celebrates individuals who not only excel in their roles but also drive meaningful change across the organization.

In addition to this, Ciara has received multiple Intel Recognition Awards. These commendations highlight her exceptional development work and her proactive approach to risk management, which has helped prevent bottlenecks in community projects. 

Her efforts around major patch sets during this period were instrumental in her winning these awards. They were not just routine contributions but were pivotal in enhancing Intel’s technological frameworks. 

DPDK Events and the Importance of In-Person Collaboration

Ciara’s experiences at DPDK events provide an illustration of her integration and active participation in the community. After completing her internship at Intel, Ciara attended the DPDK Summit as a participant, not as a speaker. 

This event was particularly significant as it occurred shortly after she returned to college in September, marking her first engagement with the community outside of a professional capacity.

During the summit, Ciara experienced the surreal yet affirming moment of connecting faces to the names of those she had interacted only via the mailing list —individuals who had reviewed her work and those whose code she had studied. 

The recognition she received from other community members, often unexpectedly knowing who she was, played a crucial role in her sense of belonging and validation within the technical community. This recognition, while surprising to her, underscored the impact of her contributions and her growing reputation within the community.

Life Beyond Work 

Balancing life with Nature and Adventure

Ciara’s life outside her technical career is focused on enhancing her well-being and providing a counterbalance to her intensive work in tech. 

A dedicated hiker, she has participated in significant events like a charity hike for Cystic Fibrosis Ireland with colleague Pable De Lara Guarch, where a group of hikers scaled Mt. Kilimanjaro, in Tanzania, (5,895 meters) to watch Siobhan Brady set a new world record performing her Celtic harp at the summit! 

This particular hike, dubbed the “highest harp concert,” is one of life’s highlights she fondly recalls. You can watch the incredible performance here

Ciara finds a unique kind of solace close to nature, living just minutes from the coast in the south of Ireland. Her daily walks on the beach, and in the summer, swimming in the ocean are more than just routine; they are a fundamental aspect of her life, crucial for her mental and physical well-being. 

These moments by the sea allow her to unwind, reflect, and regain balance, proving essential for maintaining her productivity and creativity in her professional life.

As she prepares to transition from Intel, with plans to move to Sydney, Australia, Ciara looks forward to exploring new professional landscapes and personal adventures. This move not only signifies a change in her career but also underscores her willingness to embrace new experiences and challenges, whether in tech or in her personal pursuits. 

The future holds unknowns, but Ciara approaches it with enthusiasm and excitement about the possibilities that lie ahead in both her professional and personal life.

To learn more about the benefits of contributing to DPDK read on here

DPDK Dispatch May

By Monthly Newsletter

1. Main Announcements

3. Blogs, User Stories and Developer Spotlights

4. DPDK & Technologies in the news:

5. Performance Reports & Meeting Minutes

This newsletter is sent out to thousands of DPDK developers, it’s a collaborative effort. If you have a project release, pull request, community event, and/or relevant article you would like to be considered as a highlight for next month, please reply to

Thank you for your continued support and enthusiasm.

DPDK Team.

DPDK Long Term Stable (LTS) Release 22.11.05

By Blog

The latest DPDK Long Term Stable (LTS) Release 22.11.05 includes several updates and enhancements across various components of the DPDK framework. Significant changes in this release involve numerous file modifications, which are indicated by a large number of insertions and deletions across the codebase. The release notes document extensive additions, suggesting improvements and new features in the areas of network interface controllers (NICs), cryptographic devices, event devices, and baseband processing.

Notable adjustments were made to the build system, documentation, and driver support for various hardware. Improvements in error handling, memory management, and device operation stability are also reflected in the release notes. The release also addresses various bug fixes and performance enhancements to ensure better stability and efficiency.


The update involved 246 files with a total of 3,235 insertions and 2,053 deletions. A big shout out to all the contributors to this release including:

Ajit Khaparde, Akhil Goyal, Akshay Dorwat, Alan Elder, Alex Vesker, Ali Alnubani, Andrew Boyer, Anoob Joseph, Arkadiusz Kusztal, Bing Zhao, Bruce Richardson, Chaoyong He, Chengwen Feng, Ciara Power, Dariusz Sosnowski, David Marchand, Dengdui Huang, Edwin Brossette, Eli Britstein, Emi Aoki, Erez Shitrit, Ferruh Yigit, Fidel Castro, Flore Norceide, Ganapati Kundapura, Gregory Etelson, Hamdan Igbaria, Hanumanth Pothula, Hao Chen, Harman Kalra, Hernan Vargas, Holly Nichols, Huisong Li, Jie Hai, Jonathan Erb, Joyce Kong, Kaiwen Deng, Kalesh AP, Kevin Traynor, Kiran Kumar K, Kishore Padmanabha, Kommula Shiva Shankar, Konstantin Ananyev, Kumara Parameshwaran, Long Li, Luca Boccassi, Maayan Kashani, Masoumeh Farhadi Nia, Maxime Coquelin, Michael Baum, Mingjin Ye, Morten Brørup, Mário Kuka, Neel Patel, Nithin Dabilpuram, Pavan Nikhilesh, Pengfei Sun, Qi Zhang, Qian Hao, Radu Nicolau, Rahul Bhansali, Rakesh Kudurumalla, Robin Jarry, Rongwei Liu, Satheesh Paul, Shai Brandes, Shaowei Sun, Shihong Wang, Shun Hao, Simei Su, Sivaprasad Tummala, Sivaramakrishnan Venkat, Stephen Hemminger, Suanming Mou, Sunil Kumar Kori, Sunyang Wu, Tom Jones, Viacheslav Ovsiienko, Wathsala Vithanage, Weiguo Li, Yajun Wu, and Yunjian Wang.

These contributors addressed various aspects from software fixes and performance enhancements to security improvements across multiple components of the system.

Download it here: DPDK 22.11.5

The git tree for this version can be accessed here: DPDK Stable 22.11

DPDK’s Role in Hyperscaling

By Blog

In the rapidly evolving digital landscape, hyperscaling in the cloud has emerged as a critical strategy for businesses aiming to scale their operations efficiently. The webinar, “Hyperscaling in the Cloud,” hosted by Honnappa Nagarahalli (Arm), from the DPDK Tech Board, brings together industry experts to discuss how the Data Plane Development Kit (DPDK) is revolutionizing hyperscale cloud environments.

The Webinar Panelists

The webinar featured three distinguished panelists:

1. Brian Denton: A Senior Program Manager at Microsoft Azure, Brian brings a wealth of experience in Azure’s host networking. He shared insights into Azure’s implementation of DPDK, emphasizing its use in enhancing Ethernet, and overall network performance.

2. Rushil Gupta: As a Senior Software Engineer at Google, Rushil highlighted the critical role of DPDK in financial technology (Fintech) applications on Google Cloud Platform (GCP). His discussion focused on achieving consistency, performance, and reliability in high-frequency trading platforms.

3. Jim Thompson: Co-founder of Netgate, Jim delved into the use of DPDK in networking applications outside the traditional cloud domain. His contribution illuminated the versatility of DPDK across different cloud environments and its impact on virtual private networks (VPNs).

Insights from the Webinar

DPDK in Azure’s Cloud Networking

Brian Denton’s presentation offered a glimpse into how Microsoft Azure leverages DPDK to offload packet processing from the CPU to dedicated hardware. This approach significantly reduces latency and improves throughput, enabling Azure to offer enhanced performance for virtual machines (VMs) and networking services.

Brian shared valuable insights into how DPDK has been instrumental in Azure’s network infrastructure, particularly highlighting its impact on Azure’s host networking and the broader ecosystem of partners and customers. He explained that Azure has integrated DPDK to address the need for high-speed packet processing, which is crucial for a wide range of applications, from basic web services to complex, latency-sensitive tasks like real-time analytics and high-frequency trading.

One of the key points Brian made was about the technical architecture that enables Azure to leverage DPDK’s capabilities. He detailed how DPDK is used in conjunction with Azure’s hardware, such as SmartNICs, to offload and accelerate network functions traditionally handled by software. This hardware-software synergy, as Denton explained, not only reduces CPU overhead but also significantly decreases latency, providing Azure customers with improved network performance and efficiency.

Furthermore, Brian highlighted real-world applications of DPDK in Azure, illustrating how partners and customers utilize DPDK for scenarios that require minimal latency and maximum throughput. He also discussed the continuous evolution of Azure’s networking stack, underscored by the introduction of new hardware and the ongoing optimization of DPDK to meet the growing demands of cloud computing.

Some examples: 

Clearent by Xplor used Azure SQL Database Hyperscale to revamp its merchant transaction reporting system. Previously operating on in-house systems, Clearent, which handles over 500 million transactions annually, shifted to a cloud-based setup. This move significantly boosted their ability to process and report data.

Protocall Services, a provider of telephonic crisis and behavioral health digital tools, embarked on a cloud migration journey to enhance the reliability, security, and scalability of its IT infrastructure. 

DPDK’s Impact on Fintech Applications

Rushil Gupta’s discussion on the use of DPDK in financial technology (Fintech) applications, particularly in the realm of high-frequency trading (HFT) platforms on Google Cloud Platform (GCP), sheds light on how bleeding-edge network processing technologies are evolving financial markets. 

In the fast-paced world of HFT, where milliseconds can equate to millions of dollars, the need for ultra-low latency and high throughput is paramount. Traditional cloud networking approaches may falter under such demanding requirements due to the involvement of kernel-based networking stacks that introduce additional latency. Here, DPDK’s bypass of the kernel networking stack, allowing direct access to network hardware, presents a compelling solution. This direct path significantly reduces latency and increases packet processing speed, enabling HFT platforms to operate at the speed required to capitalize on fleeting market opportunities.

Rushil illustrates how Google leverages DPDK to empower fintech customers on GCP, providing them with the infrastructure necessary to achieve the high throughput and low-latency communication essential for HFT platforms. One notable application is in the construction of complex event processing (CEP) systems, which are at the heart of many trading platforms. These systems analyze and act upon market data in real-time, necessitating the rapid processing capabilities that DPDK facilitates.

Rushil discusses the role of DPDK in enhancing data replication and recovery processes within fintech applications. In an industry where data integrity and availability are critical, DPDK’s efficiency in handling large volumes of data packets ensures that financial institutions can maintain robust data replication frameworks. This capability not only supports the high availability demands of trading platforms but also aids in achieving regulatory compliance related to data persistence and recovery.

Rushil explained how DPDK’s application in fintech on GCP demonstrates the technology’s pivotal role in enabling HFT and other financial services to meet their stringent performance and reliability criteria. With DPDK, Google provides a competitive edge to fintech applications, facilitating new levels of speed and efficiency in financial markets. 

Some examples: 

1. CME Group. As one of the world’s leading derivatives marketplaces, CME Group leverages GCP and DPDK for enhanced market data analytics and to facilitate high-speed trading. Their partnership aims to accelerate CME Group’s move to the cloud, transforming the global markets ecosystem with cloud-based innovation and scaling capacity dynamically to meet market demands.

2. Talos. Specializing in digital asset trading technology, Talos utilizes GCP’s infrastructure to support its trading platform. With DPDK, Talos benefits from reduced latency and increased throughput, essential for executing trades and managing orders across multiple exchanges and liquidity pools efficiently.

3. Clowd9. This cloud-based trading technology provider uses GCP to offer a scalable and secure platform for trading firms and financial institutions. DPDK supports Clowd9’s need for high performance and low latency in executing trades, managing risk, and processing real-time market data.

4. Freetrade. Freetrade, an investment platform, leverages GCP to power its app, offering users commission-free trading. GCP’s global infrastructure and DPDK’s network optimization capabilities ensure that Freetrade can manage high volumes of transactions and data analysis. 

5. TD Securities Automated Trading (TDSAT): TDSAT uses GCP for trading fixed-income bonds, benefiting from DPDK’s high-performance packet processing capabilities. This enables TDSAT to execute trades at high speed and with precision, critical for maintaining competitiveness in the fixed income market.

These customers and use cases underscore the importance of DPDK in enhancing network performance on GCP, making it an ideal platform for capital market applications that demand high throughput, low latency, and scalability. By leveraging GCP and DPDK, capital market firms innovate and adapt quickly to market changes, manage risks more effectively, and unlock new opportunities for growth.

Broadening DPDK’s Application Scope in VPNs and Software Routers

Jim Thompson’s insights during the DPDK webinar shed light on how DPDK is leveraged in cloud networking through the lens of Netgate’s product, TNSR (pronounced ‘Tensor’). This serves as a case study of DPDK’s implementation outside its traditional use cases. TNSR, a virtual router developed by Netgate, underscores the adaptability and robustness of DPDK in addressing specific cloud networking challenges.

In cloud environments, networking demands can quickly escalate due to the sheer volume of data transfer and the need for secure connections. Traditional VPN solutions often fall short due to bandwidth limitations and the number of tunnels they can support. Jim highlighted how these constraints could hinder the scalability and performance of cloud-based services. This scenario is particularly relevant for large organizations that require extensive interconnectivity across various cloud environments.

The introduction of TNSR as a DPDK-powered solution exemplifies how DPDK’s high-performance packet processing capabilities can be extended beyond typical use cases to solve complex cloud networking problems. By utilizing DPDK’s efficient polling mode drivers (PMDs) for network and cryptography offload, TNSR significantly enhances throughput and reduces latency in VPN connections. 

Jim explained how TNSR facilitates seamless connectivity between on-premise networks and cloud regions, highlighting the importance of VPN connections for secure data transfer. He underscored the limitations of existing cloud VPN solutions, such as bandwidth caps and tunnel number restrictions, which can significantly hamper large organizations’ networking needs. By leveraging DPDK, TNSR bypasses these limitations, providing a more flexible and scalable solution for cloud-based networking.

Take a look at Netgate’s customer stories here


The webinar underscored DPDK’s pivotal role in enabling hyperscaling in the cloud. By providing a high-performance packet processing framework, DPDK not only enhances network efficiency but also opens new avenues for application development across various industries. As cloud architectures continue to evolve, the collaboration between cloud providers, technology firms, and the open source community will be vital in harnessing the full potential of DPDK.

Join in the Hyperscaling discussion and the community on slack here.

Unleashing Network Performance with Microsoft Azure MANA and DPDK

By User Stories


In the modern cloud computing era, network performance and efficiency are paramount. Microsoft Azure has been at the forefront of this revolution, introducing innovative solutions like the Microsoft Azure Network Adapter (MANA) and integrating the Data Plane Development Kit (DPDK) to enhance the network capabilities of Azure virtual machines.

In this user story we interview Brian Denton, and Matt Reat, Senior Program Managers for Azure Core. Brian’s role has been pivotal, focusing on engaging with all network virtual appliance partners to ensure they are prepared and supported for the introduction of a new Network Interface Card (NIC) into Azure. 

Matt’s journey at Microsoft began primarily within the networking domain. His career commenced with network monitoring before transitioning, about four years ago, into what is referred to as the host networking space. This area encompasses the SDN software stack and hardware acceleration efforts aimed at enhancing customers’ ability to utilize an open virtual network (OVN) and improve their overall experience on Azure. 

A natural progression of his work has involved spearheading innovations in software and the development of hardware, which have recently been introduced to the public as Azure Boost. Additionally, his contributions include the development of the MANA NIC, a product developed in-house at Microsoft. 

The Genesis of Azure MANA

Azure MANA represents a leap in network interface technology, designed to provide higher throughput and reliability for Azure virtual machines. As the demand for faster and more reliable cloud services grows, Azure’s response with MANA smartNICs marks a significant milestone, aiming to match and surpass AWS Nitro-like functions in network and storage speed acceleration. 

Microsoft’s strategy encompasses a comprehensive approach, with a primary focus on hardware acceleration from top to bottom. This effort involves current work being conducted on the host and in the hypervisor (Hyper-V), aiming to advance hardware capabilities. Such initiatives are also being pursued by competitors, including AWS with its Nitro system and Google with a similar project, marking Microsoft’s contribution to this competitive field.

Behind the scenes, the team implemented several enhancements that remained undisclosed until the announcement of Azure Boost last July. This development compelled them to reveal their progress, especially with the introduction of the MANA NIC, which had been concealed from customer view until then.

The introduction of the new MANA NIC, boasting ratings of up to 200 Gbps in networking throughput, represents a significant enhancement of the current Azure offerings, in-line with Microsoft’s competition. The reliance on off-the-shelf solutions proved to be cost-prohibitive, prompting a shift to a fully proprietary, in-house solution integrated with their Field-Programmable Gate Array (FPGA).

DPDK’s Role in Azure’s Network Evolution

DPDK offers a set of libraries and drivers that accelerate packet processing on a wide array of CPU architectures. Microsoft Azure’s integration of DPDK into its Linux Virtual Machines (VMs) is specifically designed to address the needs of applications that demand high throughput and low latency, making Azure a compelling choice for deploying network functions virtualization (NFV), real-time analytics, and other network-intensive workloads.

The technical essence of DPDK’s acceleration capabilities lies in its bypass of the traditional Linux kernel network stack. By operating in user space, DPDK enables direct access to network interface cards (NICs), allowing for faster data plane operations. This is achieved through techniques such as polling for packets instead of relying on interrupts, batch processing of packets, and extensive use of CPU cache to avoid unnecessary memory access. Additionally, DPDK supports a wide range of cryptographic algorithms and protocols for secure data processing, further enhancing its utility in cloud environments.

Azure enhances DPDK’s capabilities by offering support for a variety of NICs optimized for use within Azure’s infrastructure, including those that support SR-IOV (Single Root I/O Virtualization), providing direct VM access to physical NICs for even lower latency and higher throughput. Azure’s implementation also includes provisions for dynamically managing resources such as CPU cores and memory, ensuring optimal performance based on workload demands.

Microsoft’s commitment to DPDK within Azure Linux VMs underscores a broader strategy to empower developers and organizations with the tools and platforms necessary to build and deploy high-performance applications at scale. By leveraging DPDK’s packet processing acceleration in conjunction with Azure’s global infrastructure and services, users can achieve the highest possible performance on Azure. 

Enhancing Cloud Networking with Azure MANA and DPDK

Azure MANA and DPDK work in tandem to push the boundaries of cloud networking. MANA’s introduction into Azure’s ecosystem not only enhances VM throughput but also supports DPDK, enabling network-focused Azure partners and customers to access hardware-level functionalities. When introducing a new Network Interface Card (NIC), it is essential to have support for the Data Plane Development Kit (DPDK). The primary concern is that Azure customers will begin to encounter Mana NICs across various Virtual Machine (VM) sizes, necessitating support for these devices. This situation highlights a notable challenge.

The scenario involves three NICs and two Mellanox drivers requiring support, indicating a significant transition. The introduction of this new NIC and its drivers is intended for long-term use. The goal is for the MANA driver to be forward-compatible, ensuring that the same driver remains functional many yearsfrom now, without the need to introduce new drivers for new NICs with future revisions, as previously experienced with ConnectX and Mellanox.

The objective is a long-term support driver that abstracts hardware changes in Azure and the cloud affecting guest VMs, offering a steadfast solution for network I/O. Although the future specifics remain somewhat to be determined, the overarching aim is to support the features available on Azure, focusing on those needs rather than the broader spectrum of Mellanox’s customer requirements. Some features necessary for Azure may not be provided by Mellanox, and vice versa. Thus, the ultimate goal is to support Azure customers with tailored features, ensuring compatibility and functionality for the long term.

Microsoft offers a wide array of networking appliances that are essential to their customers’ architectures in Azure. Therefore, part of their effort and emphasis on supporting DPDK is to ensure our customers receive the support they need to operate their tools effectively and achieve optimal performance.

Supporting DPDK is essential to accommodate those toolsets. Indeed, maximizing the use of our hardware is also crucial. This is an important point because there’s potential for greater adoption of DPDK.

Matt Reat, Senior Program Manager at Microsoft

Typically, Microsoft’s users, mainly those utilizing network virtual appliances, leverage DPDK, and they are observing increased adoption not only among Microsoft’s Virtual Academy’s but also among customers who express intentions to use DPDK. It’s not limited to virtual appliance products alone. They also have large customers with significant performance requirements who seek to maximize their Azure performance. To achieve this, leveraging DPDK is absolutely essential.

The Technicals of MANA and DPDK

The MANA poll mode driver library (librte_net_mana) is a critical component in enabling high-performance network operations within Microsoft Azure environments. It provides specialized support for the Azure Network Adapter Virtual Function (VF) in a Single Root I/O Virtualization (SR-IOV) context. This integration facilitates direct and efficient access to network hardware, bypassing the traditional networking stack of the host operating system to minimize latency and maximize throughput.

By leveraging the DPDK (Data Plane Development Kit) framework, the MANA poll mode driver enhances packet processing capabilities, allowing applications to process network packets more efficiently. This efficiency is paramount in environments where high data rates and low latency are crucial, such as in cloud computing, high-performance computing, and real-time data processing applications.

The inclusion of SR-IOV support means that virtual functions of the Azure Network Adapter can be directly assigned to virtual machines or containers. This direct assignment provides each VM or container with its dedicated portion of the network adapter’s resources, ensuring isolated, near-native performance. It allows for scalable deployment of network-intensive applications without the overhead typically associated with virtualized networking.

Overall, the technical sophistication of the MANA poll mode driver library underscores Microsoft Azure’s commitment to providing advanced networking features that cater to the demanding requirements of modern applications. Through this library, Azure ensures that its cloud infrastructure can support a wide range of use cases, from web services to complex distributed systems, by optimizing network performance and resource utilization.

“The MANA poll mode driver library, coupled with DPDK’s efficient packet processing, allows us to optimize network traffic at a level we couldn’t before. It’s about enabling our customers to achieve more with their Azure-based applications.”

Matt Reat, Senior Program Manager at Microsoft

The setup procedure for MANA DPDK outlined in Microsoft’s documentation provides a practical foundation for these advancements, ensuring that users can leverage these enhancements with confidence. Furthermore, the support for Microsoft Azure Network Adapter VF in an SR-IOV context, as implemented in the MANA poll mode driver library, is a testament to the technical prowess underlying this integration.

Performance Evaluation and Use Cases

Evaluating the performance impact of MANA and DPDK on Linux VMs highlights significant improvements in networking performance. Azure’s documentation provides insights into setting up DPDK for Linux VMs, emphasizing the practical benefits and scenarios where the combination of MANA and DPDK can dramatically improve application responsiveness and data throughput. 

Microsoft effectively utilizes the Data Plane Development Kit (DPDK) on the host side to optimize network performance across its Azure services. This approach not only supports customer applications by enhancing the speed and efficiency of data processing on virtual machines but also strengthens Microsoft’s own infrastructure. 

By leveraging DPDK, Azure can handle higher data loads more effectively, which is crucial for performance-intensive applications. For a deeper understanding of how DPDK facilitates these improvements in cloud computing, view the latest webinar, “Hyperscaling in the Cloud,” which discusses the scale and scope of DPDK’s impact on Azure’s network architecture. 

“We’re aiming to push the boundaries of network performance within Azure, leveraging MANA alongside DPDK to achieve unprecedented throughput and reliability for our virtual machines.” 

Brian Denton, Senior Program Manager, Microsoft Azure Core

Significant emphasis is placed on the first 200 gig NIC, highlighting a substantial focus on achieving high throughput. Additionally, the necessity to support a high packet rate stands as a corollary to this objective. To comprehend and benchmark their throughput across various packet sizes, extensive work is undertaken. DPDK serves as the primary method for testing their hardware in this regard.

Microsoft’s engineering counterparts focus on the overall testing methodology for developing a DPDK driver set, as well as testing the hardware itself and the VM performance on that hardware. This includes client-side involvement in testing. Currently, only Linux is officially supported for DPDK, although there have been attempts to use Windows and FreeBSD. Various host configurations also play a crucial role in qualifying their hardware.

Future Directions and Community Engagement

As Azure continues to evolve, the collaboration between Microsoft’s engineering teams and the open-source community remains vital. The development of MANA and its integration with DPDK reflects a broader commitment to open innovation and community-driven improvements in cloud networking.


As Microsoft Azure continues to evolve, the partnership between Microsoft’s engineering teams and the DPDK open-source community is poised to play a crucial role in shaping the future of cloud networking. The development of the Microsoft Azure Network Adapter (MANA) and its integration with the Data Plane Development Kit (DPDK) underscore a commitment to leveraging open innovation and fostering community-driven advancements.

The future role of Azure MANA, in conjunction with the DPDK community, is expected to focus on breaking new technical limits in cloud networking. This collaboration could lead to significant enhancements in network performance, including higher throughput, reduced latency, and greater efficiency in packet processing. By leveraging DPDK’s efficient packet processing capabilities alongside the hardware acceleration offered by MANA, Azure aims to provide an optimized networking stack that can meet the demanding requirements of modern applications and services.

Moreover, this is likely to drive the development of new features and capabilities that are specifically tailored to the needs of Azure’s diverse user base. This could include advancements in virtual network functions (VNFs), network function virtualization (NFV), and software-defined networking (SDN), which are essential components in a cloud-native networking landscape.

The open-source nature of DPDK also ensures that the broader community can contribute to and benefit from these developments, promoting a cycle of continuous improvement and innovation. This collaborative approach not only enhances the capabilities of Azure’s networking services but also contributes to the evolution of global cloud networking standards and practices.

Ultimately, the future of Microsoft Azure MANA and the DPDK open-source community is likely to be characterized by the breaking of current technical barriers, the introduction of groundbreaking networking solutions, and the establishment of Azure as a leading platform for high-performance, cloud-based networking services.

Check out the summary and additional use cases on Hyperscaling in the Cloud here.

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